Design and simulation of gate and channel engineered dopingless tunnel FET

Abstract

This work presents an innovative device design of a dopingless tunnel field effect transistor (DL-TFET). The device presented in this work is a double gate that uses dual oxide, a dual gate material, and a silicon germanium (SiGe) channel to boost the performance of the proposed device. As such, the device is named a gate and channel engineered dopingless tunnel field effect transistor (GCE-DL-TFET). The use of a high-k material and a suitable work function at the gate and the SiGe channel has considerably enhanced the performance of the GCE-DL-TFET. A fair investigation of the GCE-DL-TFET device with the DL-TFET device reveals significant improvements in ON-current (ION), ION/IOFF ratio, subthreshold slope (SS), and cut-off frequency (fT). The proposed device shows the following increases: ~200 times in ION, 2.5 times in ION/IOFF, and 20 times in fT, as well as 70% improvement in SS. The transient analysis indicates the following decreases: 84% in transient-ON delay and 62% in transient-OFF delay in the GCE-DL-TFET-constructed inverting amplifier in contrast to the DL-TFET-based inverting amplifier.